As the existing text-based image search results sorting cannot meet the users' query expectations, two kinds of content-based re-ranking methods for image search results named SI (Similarity Integral) algorithm and D (Dijkstra) algorithm were put forward. These methods treated images as nodes, used the color and shape features to calculate the similarity between images, and took the similarity as the edge's weight to construct the similarity graph. SI algorithm sorted the images according to the similarity integral of each node image, and D algorithm traversed all the images from the specified image by Dijkstra algorithm. The experimental results show that both of the methods can improve the sorting performance of the image search. In addition, SI algorithm is suitable for the situation with initial precision rate at 0.5-0.9, while D algorithm does not require the initial precision rate, but has high accuracy requirements of similarity value between images, and can be used to the images re-ranking queried by an specified image.

To improve the efficiency of hardware resources of the Advanced Encryption Standard (AES) algorithm on the Field Programmable Gate Array (FPGA), an implementation method of serial AES circuit that could perform both encryption and decryption with 128/192/256bit key options was proposed. The design computed byte multiplication inverse in composite field transform, integrated MixColumn and InvMixColumn circuits, and fused three kinds of key expansion algorithms at the same time. The design was implemented in Xilinx FPGA Virtex-Ⅴ and the consumption of hardware resources was 1871slices, 4 block RAM. The results show that the throughput can be up to 2119/1780/1534Mb·s^(-1) for 128/192/256bit key length while the maximum frequency is 173.904MHz. The design achieves high throughput/hardware resource ratio and can be applied to the Gigabit Ethernet.